Fully automated, high-performance PECVD equipment SA-EPEE i200

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SKU: SA-EPEE i200

Ā  Ā  Ā  SA-EPEE i200 is an automated 150/200mm PECVD equipment for Si, SiC and GaAs wafers. Adopting twin-chamber design with dual-frequency RF, it deposits SiO2, SiNx, TEOS and BPSG films with ≤3% cross-wafer uniformity. Integrated with EFEM cooling and RPS in-situ cleaning, it raises throughput by 20%, cuts footprint and reduces CoC & CoO, fully optimized for mass production of power semiconductors and logic chips.Ā 

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Description

SA-EPEE i200 is an automated 150/200mm PECVD equipment for Si, SiC and GaAs wafers. Adopting twin-chamber design with dual-frequency RF, it deposits SiO2, SiNx, TEOS and BPSG films with ≤3% cross-wafer uniformity. Integrated with EFEM cooling and RPS in-situ cleaning, it raises throughput by 20%, cuts footprint and reduces CoC & CoO, fully optimized for mass production of power semiconductors and logic chips.

Feature

Application

  • High Efficient Trasfer System
  • Less footprint
  • Lower CoO & CoC
  • Compound Semiconductor
  • R&D
  • High and New Technology Industry

Precess control ability with SiH4态TEOS process:

Parameter

SiH4 Base

TEOS Base

SiH4-SiO2

SiNx

SiON

BPSG

TEOS-SiO2

BPSG

Gas Line

10

7

Thickness(A)

200~20000

200~10000

200~2000

300~20000

300~20000

300~20000

DR(A/min)

1000~15000

1000~15000

1000~10000

1000~15000

1000~15000

1000~15000

U%,1sigma

1.5%态1.5%态1.5%

R.I

1.5±0.05

2.0±0.2

1.7±0.1

1.46±0.02

1.46±0.02

1.46±0.02

Stress(MPa)

-100,Tunable

±100

-100

±100

±100

±100

PA(>0.20μm)

<30

Chamber

Temperature

70±5ā„ƒ

Process

Temperature

Max 550ā„ƒ

B/P

-

-

-

2~6% wt%

-

2~6% wt%

Principle:

Tool and Facilities:

No.

Module Name

Quantity

Tool

1

Process Module(SiH4/TEOS/Carbon)

3

2

Transfer Module(EFFM态Loadlock)

1

3

SMIF(Pod)/Open cassette

3

Facility

4

Dry Pump(PM)

3

5

Dry Pump(TM)

2

6

Chiller

1

7

RF Cabinet

1

8

Power Supply Cabinet

1

9

Transformer

1

10

LDS(TEOS/TEPO/TEB)

3

Capacity Requirements:

Tool Name

1PM

2PM

3PM

Image

Application

- EFEM + Loadlock

- 2 Pod

- 1 module

- 2 wafers

- EFEM + Loadlock

- 2 Pod

- 2 process modules

- 4 wafers

- EFEM + Loadlock

- 3 Pod

- 3 process modules

- 6 wafers

Footprint

2850Ɨ2100Ɨ2600mm=6.0m2

2850Ɨ2100Ɨ2600mm=6.0m2

3360Ɨ2100Ɨ2600mm=7.0m2

Specification

Features

Wafer Size6″, 8″
Substrate TypeSi, SiC, W, TiN, Ti, TiW
Deposit MaterialsSiO2, SiNx, SiON, TEOS SiO2, BPSG

General

Standard ConfigurationSMIFƗ3+EFEMƗ1+LLƗ2+TMƗ1+PMƗ3
Wafer StationTwins chamber, 2 pcs/chamber, max 6pcs for 3 chambers
AutomationOpen cassette/SMIF
ProcessSiO2/SiNx/TEOS/BPSG
UniformityWIW ≤3.0%态WTW≤3.0%态RTR≤3.0%
Gas ConfigurationTEOS/TEPO/TEB/O2/SiH4/NH3/N2O/He/N2/NF3/Ar(RPS)
Cooling ModuleEFFM cooling buffer
Foot print2100Ɨ3360(7.0m2)
WPH(relative)1.20
CoC(relative)0.83
CoO(relative)0.75
Clean ModeRPS clean,>2μm/min
Size(LƗWƗH)2100mmƗ3360mmƗ2600mm

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